Power Supply Efficiency

Power supply efficiency and field reliability, within cost constraints, are the two major driving functions in most power supply design. It is essential that the power supply designer and user have a grasp of this at the outset of design.

Efficiency, as expressed in terms of power loss, has a major impact on both reliability and cost. The purpose of this section of the tutorial is to give some insight into this.

Efficiency, Nu, is the ratio Pout/Pin, often expressed as a percentage, where Pout is the power supply output power going to the load, and Pin is the power supply input power needed to provide that power. A plot of Efficiency as a function of load is shown in Figure PSE-1. Since the Pout is zero at no load, efficiency always starts at zero and rapidly builds up towards the peak efficiency. Usually it is slightly less than the peak efficiency at full load.

Figure PSE-1: Power Supply Efficiency Vs Load

Power loss is the difference between Pin and Pout and can be expressed in terms of efficiency as Ploss = (Pout)*(Nu/(1-Nu)), where Nu is the efficiency (as a number less than 1, not a percentage). Figure PSE-2 shows power loss as a function of load or output power. At zero load there is power loss due to the control and power management circuits. This is called the quiescent current or power. As the load increases the power loss increases as a linear function due to voltage drop and as a squared function due to resistive losses. The result is the power losses usually cusp upwards as load increases.

Figure PSE-2: Power Loss vs Output Power

Looking at the power loss characteristics of devices and keeping track of power losses is often a more practical method of looking for ways to increase efficiency than looking at efficiency directly.

Implications of Power Loss

Two factors influence the size of a power supply, the size of the components and packaging, and the thermal density - the power dissipated per unit volume. The latter is a very useful measure. It is used to discuss the system impact of efficiency on system size, weight, reliability, cost of power, and cost of cooling.

Assume that an electronic load and its cooling system operate at a power density that limits the temperature rise above ambient to a fixed value. If the power supply uses the same type of components and is limited to the same temperature rise, then the size of the power supply is determined by its efficiency -- assuming you can packaged the parts in the thermal-density volume, which is usually the case.

Figure PSE-3 shows three systems with the same electronic load with power supplies of three different efficiencies, 35%, 65%, and 83%. The volume of the load is shown in blue and the relative volume of the power supply is shown in red. For equal thermal density design, a 35% efficient power supply is 1.86 times the size of the load, a 65% efficient supply is 0.54 the size, and a 83% efficient supply is only 0.20 the size of the load. These efficiencies are not arbitrary but represent the history of power supply design for 5 Vdc logic circuits.

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Figure PSE-3: Equal Thermal Density Vs Efficiency

The first power supplies for 5 Vdc logic circuits used transformer-rectifier sets followed by series dissipative regulators. The efficiency for power conversion was about 35% and the power supplies were larger than the load and required more cooling than the load. This was totally unacceptable to systems engineers and considerable pressure was applied to designers to reduce the size of the power supply. The initial approach was to increase the power density of the power supply, by running the components hotter, taking out design margin, and packaging the power supply differently than the rest of the load. This reduced the size of the power supply but increased the cost and greatly reduced the reliability due to higher component temperatures and less design margin. In fact, power supply reliability got so bad it was usually the major reason for system failure. Switching-mode power supplies were avoided since they were perceived (erroneously for the most part) as an electromagnetic interference problem.

Finally, after successful use of 20 kHz switching-mode power supplies in several systems, they became the norm. For more than a decade, these power supplies ranged from about 62% to 71% efficient. A 65% efficient power supply is shown in Figure 2-3. Even though the power supply was only 0.54 the volume of the load, the pressure remained for smaller power supplies, hence more efficiency. This was achieved with Schottky diodes, synchronous rectifiers, power MOSFET transistors, and better packaging (to minimize leakage inductance) to get to the present 83% efficiency for 5V logic. The power supply is about 0.2 the volume of the load and is shown in Figure 2-3. Efficiency keeps improving and you now see efficiency of greater than 90% for 5V power supplies.

Unfortunately, the trend for logic circuits is to use lower voltages. For the 1.8 to 2.0 Vdc supplies used for 0.25 um logic, even using all the techniques to get 83% efficiency for 5 Vdc logic only results in 65% efficiency for a 1.8 Vdc power supply. Again, efficiency keeps improving with time even for low voltage power supplies.

The system implications of poor efficiency not only include size and the associated weight, but the cost of the electrical power and cooling added to the system due to poor efficiency. Electrical power is often included in system trade-off calculations to determine the system cost of poor efficiency. Of equal or greater impact is the cost of cooling, it is often greater than the cost of the wasted electrical power and is often left out of trade studies.

The bottom line of this discussion is that there are overwhelming system reasons to use power conversion techniques that are ideally 100% efficient and to constantly work on less than ideal components to get as close to 100% efficiency as possible. For the most part this means dissipative techniques are out of favor and lossless techniques, including switching-mode power supplies, are in favor.

Do not use this information for design without independent verification of the information.